Intel's x86 chips are now forging into new territory — leaked slides published by prominent hardware leaker @YuuKi_AnS (yet quickly removed) indicate that the compute tile of the Lunar Lake MX processors will be made using TSMC's N3B fabrication technology, marking the first time Intel has used outsourced process node tech for its highest-end x86 cores. Intel's Lunar Lake processors are set to feature an all-new microarchitecture designed from the ground up to offer breakthrough performance-per-watt efficiency, primarily for mobile devices, but it is unclear how old the slides are — these could reflect an older plan for the series.

According to the slides, Intel's Lunar Lake MX platform lineup will offer processors with up to eight general-purpose cores (four high-performance Lion Cove and four Skymont energy-efficient cores), 12MB cache, up to eight Xe2 GPU clusters, and up to a six-tile NPU 4.0 AI accelerator. Depending on the power target, the platform will support 8W fanless as well as 17W – 30W fanned designs.

The compute tile will purportedly be produced on TSMC's 3nm-class N3B process technology. Meanwhile, Intel itself indicated that its Lunar Lake CPUs will use its own 18A (1.8nm-class) fabrication process.Intel's Lunar Lake MX platform will retain Intel's multi-chiplet Foveros3D-interconnected design approach. Still, to reduce its physical footprint, Intel plans to pack the CPU, GPU, and memory controller into the same tile while putting everything else into the SoC tile, according to the slides.

In addition, Intel's Lunar Lake MX is aimed primarily at laptops, and it is set to come with 16GB or 32GB of LPDDR5X-8533 memory-on-package, which will further reduce the platform's footprint and improve performance.

Based on Intel's estimates presented in the slides, its Lunar Lake MX design will save 100 to 250mm^2 of space compared to typical designs with memory outside the CPU package.  

While it is odd to see Intel using TSMC's N3B process technology to build its Lunar Lake MX processors, it is not completely unexpected. Since the company wants to put CPU and GPU cores into the same piece of silicon, it might just make more sense to build everything on TSMC's N3B because GPUs tend to be bigger than CPUs and re-architecting Xe2 GPU for Intel's 18A node could take more time than the company would like to spend on its low-power mobile processor. 

Nonetheless, this is the first time Intel will use a third-party process technology for one of its flagship CPUs, highlighting the flexibility of its IDM 2.0 approach to design and manufacturing.

By Anton Shilov